HP 1600A Logic State Analyzer Withe 4-Probes+Operating and Service Manual

$299.00

HP 1600A LOGIC STATE ANALYZER WITH 4-PROBES+OPERATING AND SERVICE MANUAL

The HP 1600A Logic State Analyzer is designed to aid in the analyses of digital system which depend on sequences of logic states to contro their operation. The 1600A provides a functional display of ones and zeros in a tabular format of logic states with up to 16 variables in a digital system (up to 32 variables may be displayed when a Model 1607A Logic State Analyzer is used with the 1600A in the bus mode)

This is a used item – normal wear and tear can be expected. It powers up and performs self-test successfully, but no other testing has been done. However, it is Guaranteed against DOA.

Out of stock

SKU: hp 1600a Category:

Description

This is a used HP 1600A Logic Analyzer – normal wear and tear can be expected.:

Specifications:

CLOCK AND DATA INPUTS:

  • Repetition Rate: 0 to 20 Mhz.
  • Input RC : 40 kohm +, – 3kohm shunted by +,<14 pF.
  • Input Bias Current: =, <30 uA.
  • Input Threshold: TTL< fixed at approx +1.5 V; variable, +,- 10 Vdc.
  • Maximum Input:
    Level: -15 to +15 Vdc
    Swing : 15 V peak fro threshold.
  • Minimum Input:
    Swing: 0.5 V +5% of p-p threshold voltage.
  • Clock Pulse Width: 20 ns at threshold.
  • Data Pulse Width: 25 ns at threshold.
  • Data Setup Time: time data must be present prior to clock transition, 20 ns.
  • hold time: time dat must be present after clock transition, 0 ns.>PATTEN AND DELAYED TRIGGER OUT-PUTS
  • High: =,>2 V into 50 ohm (line driver interface).
  • Low: <0.4 V into 50 ohm (line driver interface).PULSE DURATION:
  • Delayed Trigger: approx 25 ns (RZ format) at 1 B level.
  • Pattern Trigger: approx 25 ns in RZ format at 1 V level with delay set to zero or off. With delay on and not set to zero, pattern trigger output starts on receipt of a pattern trigger signal and ends when the delay ends.TRIGGER ARM INPUT:
  • Impedance: 50 ohm.
  • Level: low state, 0 V to <0.4 V; high state, 2 V to <5 V.
  • Pulse Width: 15ns minimum at 1.5 V level.
  • Arming Conditions: if the arming pulse positive edge occurs <45 ns after a clock, triggering occurs on the same clock cycle that it is armed. If the arming pulse positive edge occurs >75 ns after a clock, triggering occurs on the nest clock cycle.

Included:

  • 1-HP 1600A
  • 3- hp 10231C six bit data Probe
    40kohm, 12pF
  • Max Input:
  • 1-attached pouch
  • 1-power cord +, – 15V from Ground &
    +, – 15V from Threshold
  • hp 10230C Clock Probe
    40kohm, 12pF
  • Max Input: +, – 15V from Ground &
    +, – 15V from Threshold
  • 1-Logic State Analyzer 1600A Operating and Service Manual
  • 1-Logic State Analyzers 1600A/1607A Field Training Manual
  • HP Six Bit Data Probe 10231C Operating Note
  • HP Clock Probe 10230C Operating Note

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